News

Interns on Radio

Submitted by sybreon
on Wed, 2011-08-10 00:00

One of our interns, was recently interviewed in a special programme on Malaysia's leading business radio station - BFM. The interview is on an internship programme in Malaysia, which the intern was a participant, and their experiences. You can listen to the interview in the podcast below.

You can find out about the experiences of other interns here and apply for an internship experience unlike any other within Malaysia!

AEMB Benchmarked

Submitted by sybreon
on Tue, 2010-08-24 10:13

A recent Masters of Science project from TU Delft did some comparison and benchmarking of various open source microprocessors including the AEMB. They compared it against several architectures including the LEON3 (SPARC V8), Plasma (MIPS) and others. They found that in terms of the speed and resources, the AEMB emerged as the optimised option.

Although they finally dropped the use of the AEMB, they presented some very useful results in Chapter 2 of the thesis.

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AEMB in China

Submitted by sybreon
on Thu, 2010-06-03 00:00

Seems like there are two important pieces of news to report: that the AEMB has made in-roads into China; and that the AEMB is capable of booting uC/OS-II. According to the information provided at a Chinese news website, a Chinese university (Shandong University of Science and Technology) has successfully implemented an SoC system based on the AEMB and boots uC/OS-II.

They published a paper on this in April of this year. The details are mostly in Chinese but some information can be gleaned from the diagrams and references.

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aemb

Hardware Assisted Synchronisation

Submitted by sybreon
on Sun, 2010-08-08 00:00

An idea about hardware assisted synchronisation for the AEMB came about recently. The idea centered on the problem of how multiple threads would communicated between each other. The solution to this problem has always been synchronisation primitives.

The AEMB already supports the atomic MSRSET/MSRCLR instructions, which can be used as a mutex primitive. This hardware mutex can be used to build additional synchronisation operations in software. However, this is an inefficient method for doing software synchronisation.

Since the AEMB is a multi-threaded processor by default, it will be used

AEMB on Altera with uC/OS-II in China

Submitted by sybreon
on Thu, 2010-06-03 00:00

Seems like there are three important pieces of news to report: that the AEMB has made in-roads into China; that the AEMB has been implemented on Altera hardware; and that the AEMB is capable of booting uC/OS-II. According to the information provided at a Chinese media website, a key Chinese university (Shandong University of Science and Technology) has successfully implemented an SoC system using the AEMB on an Altera platform and boots uC/OS-II.

They published a paper on this earlier this year.

Virtual Kernel

Submitted by sybreon
on Sun, 2010-05-09 00:00

While everyone seems to be quite focused on high-end virtualisation, there is also room for virtualisation solutions at the low-end. One way of approaching this problem is by the use of a thin layer of virtualisation at the nano-kernel level. Instead of just abstracting hardware away, it is also possible to put in entirely virtual hardware devices for embedded applications. This allows things like I/O peripherals to be abstracted and run entirely as pure software only.

The AENIX kernel will sport such virtualisation solutions instead of just being a regular nano-kernel.

Power Optimisation

Submitted by sybreon
on Sat, 2010-05-08 00:00

Since the recent LLVM 2.7 release came with initial support for the Microblaze, it is now conceivable to add some features into the LLVM to enable power optimisation for the AEMB and other architectures. The reason that LLVM is chosen instead of GCC is purely subjective – a cleaner code base and the open license adopted.

The idea of power optimisation lies behind the premise that power is a systems level problem – not a hardware one. While hardware is a large contributor, hardware cannot do anything unless it is commanded by software, which is ultimately slaved to user events.

New Multi-Threading Model

Submitted by sybreon
on Sun, 2010-04-25 00:00

In order to streamline the new AEMB processor family, a new multi-threading model is being tested. In the new multi-threading model, each core will have at least the capability of running four threads either manually or automatically. For the AEMB1, the threads would need to be switched explicitly using special software break instructions while for the AEMB4, the context switching will happen automagically and the AEMB2 will be somewhere in between the two.

As for the software, the AEMB1 will be focused for single-threaded applications.

AEMB Powered OpenBTS

Submitted by sybreon
on Tue, 2010-01-19 00:00

The OpenBTS project is an exciting project. The OpenBTS project runs on GNU Radio hardware, which is why it excites – the USRP2 has the AEMB as its core processor.

OpenBTS is an open-source Unix application that uses the Universal Software Radio Peripheral (USRP) to present a GSM air interface to standard GSM handset and uses the Asterisk software PBX to connect calls.

Tags: 
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In-Cache Execution Environment

Submitted by sybreon
on Thu, 2009-10-29 00:00

The AEMB is designed with an FPGA target technology implementation. Since this is the case, it may be prudent to exploit certain FPGA capabilities that are not present on ASIC technologies. One such capability is the ability of an FPGA to pre-load the contents of block memories from an FPGA image. This ability is often used to create a read-only RAM block or ROM block.

However, if the write-enable signal is enabled this ability can be used to pre-load the contents of any RAM block such as the one used to hold the instruction cache of the AEMB.

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